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"SECAP" International Advanced Packaging Consortium Formed to Standardize Wafer Level Technologies TAIPEI, Taiwan, Sept. 13 /PRNewswire/ -- A group of leading global semiconductor equipment suppliers have joined forces with the Fraunhofer Institute for Reliability and Microintegration IZM to form a new consortium aimed at optimizing equipment for wafer bumping and wafer level packaging technologies. It was announced here today by SUSS MicroTec, one of the companies involved. Operating under the name of "SECAP" (Semiconductor Equipment Consortium for Advanced Packaging), the group will address current challenges in semiconductor packaging, considered one of the major roadblocks in the industry's current five-year technology roadmap. One immediate initiative will be to develop and validate process equipment for the industry's conversion to high density interconnect and 300 mm wafer technology. Initial participating companies include SUSS MicroTec, Semitool, and Unaxis (formerly Balzers Process Systems), all three leading equipment suppliers in photolithography, electroplating and sputtering, as well as Image Technology, a leading producer of large area photomasks. These companies will share market research data, define process and tool interfacing and jointly develop technology roadmaps. The Fraunhofer Institute will act as a consultant and technical link between the equipment suppliers to identify specific equipment requirements. The Fraunhofer Institute will assume the role of the application center for process sequence integration between the different partners' equipment. The consortium welcomes additional new members who are leaders in their product category and are equipment suppliers for wafer level packaging. In explaining the need for the consortium, Dietrich Toennies, International Product Manager for SUSS MicroTec, said the industry's transition to 300 mm technology has focused heavily on front end equipment and automation issues. However, with the growing need for wafer bumping and wafer level packaging, backend processes have to be performed at the wafer level, which will be impacted significantly by the change to larger wafers. "This consortium will benefit our customers because it will harmonize the different types of systems and processes used for advanced packaging. In other words, a customer buys into a fully functional process sequence rather than into individual steps," Mr. Toennies explained. "The lithography process, for example, cannot be addressed independently from photomask technology and metallization techniques. All processes influence each other and it is important that the different types of systems are in harmony." According to Paul Siblerud, General Manager Advanced Packaging Division of Semitool, "Our goal is that the process development work within this consortium will successfully evaluate and optimize equipment performance and prove the high quality of the products we deliver. This consortium of innovative companies will assure customers a more mature and complete solution." He emphasized, however, that the SECAP consortium does not intend to develop and market packaging technologies, since its purpose is not to create a competitive situation with the customers of the equipment companies involved. "Incorporating VLSI front end of line equipment to the back end with the other member companies," states Mr. Siblerud, "will pace the technical roadmap currently in place." The consortium seeks to offer a new and powerful kind of partnership to customers because wafer level packaging is a new technology requiring a strong coherent infrastructure, according to Hans Auer, General Manager Advanced Packaging at Unaxis. "One goal is to provide comprehensive technical expertise to our customers with respect to wafer level back end processes. Of course all companies within this consortium will remain independent, marketing their own solutions in their established business environment," Mr. Auer said. The importance of masks in this effort was explained by James A. Quinn, Vice President of Image Technology in Palo Alto, California. "Precision photomasks are a key enabling technology for 300 mm advanced packaging applications and we are working on realizing large area photomasks with the same tight specifications that we came to realize for 200 mm technology. Additionally, our goal is to continue to define the standards for precision photomasks in the wafer level packaging industry, because no standards exist so far," he said. Oswin Ehrmann of the Fraunhofer Institute of Reliability and Microintegration IZM said he believes this cooperative effort will offer major benefits to the entire advanced packaging industry. "In particular, we consider the development of 300 mm technology to be an important milestone. We hope to utilize the consortium members' capabilities to develop the first 300 mm wafer bumping line operating in a research institute anywhere in the world." About Semitool About Unaxis About Image Technology About Fraunhofer Institute
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